Development of Synthesizable IP Cores for UART

Authors:V.RAMA GOWRI BOBBILI, P.K.SURESH, PROF.M.MURALI

8007-8010

Design of Efficient Full Adder Design with Reduced Transistors

Authors:M. SHAILENDRA, B. HARI KRISHNA

8011-8016

Automatic Street Light Control System for Power Saving using a Zigbee Network and Sensors

Authors:J.RAJASEKHAR, M.SUNEELA

8017-8020

High Speed Reed Solomon Decoder Based On Berlekamp-Massey Algorithm

Authors:THOKALAVIJAYA KANTH, TATIKONDA SRIDEVI

8021-8026

A Novel High Capacity Steganographic Technique Based on GA and IWT Algorithm

Authors:B. PADMAJYOTHI, V. PHANI BHUSHAN

8027-8031

BIST Pattern Generation of Functional Broadside Tests for Fixed s27 Benchmark Circuit with Low Power Consumption

Authors:KOTTNANA JANAKI RAM, MALLAM MADHAVI, DR.A.GURUVA REDDY

8032-8037

Transient Stability Analysis in Microgrids using P-F Droop Controller

Authors:G.V.KIRAN KUMAR REDDY, K.MEENENDRANATH REDDY, G.VENKATA SURESH BABU

8038-8045

Design of Accessible Display using ARM9 to Control Home Area Networks

Authors:SHAMEEM SHAIK, SHAIK ABDUL SUBHANI

8046-8050

Fault Current Interruption by the Dynamic Voltage Restorer

Authors:P.SWATHI, P. UDAI KUMAR REDDY

8051-8057

Realization of 32-Bits Carries Select Adder using Verilog

Authors:ALAHARI ANUSHA, P. BALANAGU

8058-8063